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Higher package versions for example, those for GNU is the only operating system developedspecifically to give its users freedom.

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Free softwareputs its users in control of their own computing. Nonfree softwareputs its users under the power of the software's developer. Seethe video explanation. Furthermore, if only some of the grouped targets are out of date or missing make will realize that running the recipe will update all of the targets. Caution must be used if relying on this variable in the recipe of a grouped target rule. Unlike independent targets, a grouped target rule must include a recipe.

However, targets that are members of a grouped target may also appear in independent target rule definitions that do not have recipes. Each target may have only one recipe associated with it. If a grouped target appears in either an independent target rule or in another grouped target rule with a recipe, you will get a warning and the latter recipe will replace the former recipe. Additionally the target will be removed from the previous group and appear only in the new group.

One file can be the target of several rules. All the prerequisites mentioned in all the rules are merged into one list of prerequisites for the target.

If the target is older than any prerequisite from any rule, the recipe is executed. There can only be one recipe to be executed for a file. If more than one rule gives a recipe for the same file, make uses the last one given and prints an error message. This odd behavior is only for compatibility with other implementations of make … you should avoid using it. Occasionally it is useful to have the same target invoke multiple recipes which are defined in different parts of your makefile; you can use double-colon rules see Double-Colon for this.

An extra rule with just prerequisites can be used to give a few extra prerequisites to many files at once. For example, makefiles often have a variable, such as objects , containing a list of all the compiler output files in the system being made. An easy way to say that all of them must be recompiled if config.

This could be inserted or taken out without changing the rules that really specify how to make the object files, making it a convenient form to use if you wish to add the additional prerequisite intermittently. Another wrinkle is that the additional prerequisites could be specified with a variable that you set with a command line argument to make see Overriding Variables.

For example,. If none of the explicit rules for a target has a recipe, then make searches for an applicable implicit rule to find one see Using Implicit Rules. Static pattern rules are rules which specify multiple targets and construct the prerequisite names for each target based on the target name.

They are more general than ordinary rules with multiple targets because the targets do not have to have identical prerequisites. Their prerequisites must be analogous , but not necessarily identical. The targets list specifies the targets that the rule applies to. The targets can contain wildcard characters, just like the targets of ordinary rules see Using Wildcard Characters in File Names.

The target-pattern and prereq-patterns say how to compute the prerequisites of each target. Each target is matched against the target-pattern to extract a part of the target name, called the stem. This stem is substituted into each of the prereq-patterns to make the prerequisite names one from each prereq-pattern.

The rest of the pattern must match exactly. For example, the target foo. The targets foo. Here is an example, which compiles each of foo.

Each target specified must match the target pattern; a warning is issued for each target that does not. If you have a list of files, only some of which will match the pattern, you can use the filter function to remove non-matching file names see Functions for String Substitution and Analysis :.

A static pattern rule has much in common with an implicit rule defined as a pattern rule see Defining and Redefining Pattern Rules. Both have a pattern for the target and patterns for constructing the names of prerequisites. The difference is in how make decides when the rule applies.

An implicit rule can apply to any target that matches its pattern, but it does apply only when the target has no recipe otherwise specified, and only when the prerequisites can be found. If more than one implicit rule appears applicable, only one applies; the choice depends on the order of rules.

By contrast, a static pattern rule applies to the precise list of targets that you specify in the rule. It cannot apply to any other target and it invariably does apply to each of the targets specified. They are handled differently from ordinary rules when the same target appears in more than one rule. Pattern rules with double-colons have an entirely different meaning see Match-Anything Rules.

When a target appears in multiple rules, all the rules must be the same type: all ordinary, or all double-colon. If they are double-colon, each of them is independent of the others. If there are no prerequisites for that rule, its recipe is always executed even if the target already exists.

This can result in executing none, any, or all of the double-colon rules. Double-colon rules with the same target are in fact completely separate from one another. Each double-colon rule is processed individually, just as rules with different targets are processed. The double-colon rules for a target are executed in the order they appear in the makefile.

However, the cases where double-colon rules really make sense are those where the order of executing the recipes would not matter. Double-colon rules are somewhat obscure and not often very useful; they provide a mechanism for cases in which the method used to update a target differs depending on which prerequisite files caused the update, and such cases are rare.

Each double-colon rule should specify a recipe; if it does not, an implicit rule will be used if one applies. In the makefile for a program, many of the rules you need to write often say only that some object file depends on some header file.

For example, if main. You need this rule so that make knows that it must remake main. You can see that for a large program you would have to write dozens of such rules in your makefile.

And, you must always be very careful to update the makefile every time you add or remove an include. To avoid this hassle, most modern C compilers can write these rules for you, by looking at the include lines in the source files. For example, the command:. Note that such a rule constitutes mentioning main. That command would create a file depend containing all the automatically-generated prerequisites; then the makefile could use include to read them in see Include.

In GNU make , the feature of remaking makefiles makes this practice obsolete—you need never tell make explicitly to regenerate the prerequisites, because it always regenerates any makefile that is out of date. See Remaking Makefiles. The practice we recommend for automatic prerequisite generation is to have one makefile corresponding to each source file. For each source file name. That way only the source files that have changed need to be rescanned to produce the new prerequisites.

Here is the pattern rule to generate a file of prerequisites i. See Pattern Rules , for information on defining pattern rules. This omits prerequisites on system header files. See Include. See Substitution Refs , for full information on substitution references. See How Make Works.

The recipe of a rule consists of one or more shell command lines to be executed, one at a time, in the order they appear. Typically, the result of executing these commands is that the target of the rule is brought up to date.

See Recipe Execution. Makefiles have the unusual property that there are really two distinct syntaxes in one file. Most of the makefile uses make syntax see Writing Makefiles. However, recipes are meant to be interpreted by the shell and so they are written using shell syntax. The make program does not try to understand shell syntax: it performs only a very few specific translations on the content of the recipe before handing it to the shell.

Each line in the recipe must start with a tab or the first character in the value of the. Blank lines and lines of just comments may appear among the recipe lines; they are ignored. One of the few ways in which make does interpret recipes is checking for a backslash just before the newline. As in normal makefile syntax, a single logical recipe line can be split into multiple physical lines in the makefile by placing a backslash before each newline.

A sequence of lines like this is considered a single recipe line, and one instance of the shell will be invoked to run it. Both the backslash and the newline characters are preserved and passed to the shell.

Whitespace is never added to the recipe. If you specify a different shell in your makefiles it may treat them differently. This is often the case when passing scripts to languages such as Perl, where extraneous backslashes inside the script can change its meaning or even be a syntax error.

One simple way of handling this is to place the quoted string, or even the entire command, into a make variable then use the variable in the recipe.

If we rewrite our example above using this method:. If you like, you can also use target-specific variables see Target-specific Variable Values to obtain a tighter correspondence between the variable and the recipe that uses it. The other way in which make processes recipes is by expanding any variable references in them see Basics of Variable References.

This occurs after make has finished reading all the makefiles and the target is determined to be out of date; so, the recipes for targets which are not rebuilt are never expanded. Variable and function references in recipes have identical syntax and semantics to references elsewhere in the makefile. Normally make prints each line of the recipe before it is executed. We call this echoing because it gives the appearance that you are typing the lines yourself.

Typically you would use this for a command whose only effect is to print something, such as an echo command to indicate progress through the makefile:. See Summary of Options. This flag is useful for finding out which recipes make thinks are necessary without actually doing them.

A rule in the makefile for the special target. When it is time to execute recipes to update a target, they are executed by invoking a new sub-shell for each line of the recipe, unless the. Please note: this implies that setting shell variables and invoking shell commands such as cd that set a context local to each process will not affect the following lines in the recipe. Then make will invoke one shell to run the entire line, and the shell will execute the statements in sequence.

Sometimes you would prefer that all the lines in the recipe be passed to a single invocation of the shell. There are generally two situations where this is useful: first, it can improve performance in makefiles where recipes consist of many command lines, by avoiding extra processes.

Second, you might want newlines to be included in your recipe command for example perhaps you are using a very different interpreter as your SHELL. ONESHELL special target appears anywhere in the makefile then all recipe lines for each target will be provided to a single invocation of the shell.

Newlines between recipe lines will be preserved. This feature is intended to allow existing makefiles to add the. Since the special prefix characters are not legal at the beginning of a line in a POSIX shell script this is not a loss in functionality.

For example, this works as expected:. Even with this special feature, however, makefiles with. For example, normally if any line in the recipe fails, that causes the rule to fail and no more recipe lines are processed.

You can modify. Ultimately you may need to harden your recipe lines to allow them to work with. The argument s passed to the shell are taken from the variable. The default value of. This is because the SHELL environment variable is used to specify your personal choice of shell program for interactive use. It would be very bad for personal choices like this to affect the functioning of makefiles.

See Variables from the Environment. Furthermore, when you do set SHELL in your makefile that value is not exported in the environment to recipe lines that make invokes.

You can override this behavior by explicitly exporting SHELL see Communicating Variables to a Sub- make , forcing it to be passed in the environment to recipe lines. The stock shell, command. In every directory it examines, make will first look for the specific file sh in the example above. If this is not found, it will also look in that directory for that file with one of the known extensions which identify executable files.

For example. If any of these attempts is successful, the value of SHELL will be set to the full pathname of the shell as found. However, if none of these is found, the value of SHELL will not be changed, and thus the line that sets it will be effectively ignored. This is so make will only support features specific to a Unix-style shell if such a shell is actually installed on the system where make runs.

Note that this extended search for the shell is limited to the cases where SHELL is set from the Makefile; if it is set in the environment or command line, you are expected to set it to the full pathname of the shell, exactly as things are on Unix. GNU make knows how to execute several recipes at once. Normally, make will execute only one recipe at a time, waiting for it to finish before executing the next.

You can inhibit parallelism in a particular makefile with the. The default number of job slots is one, which means serial execution one thing at a time. Handling recursive make invocations raises issues for parallel execution. For more information on this, see Communicating Options to a Sub- make. If a recipe fails is killed by a signal or exits with a nonzero status , and errors are not ignored for that recipe see Errors in Recipes , the remaining recipe lines to remake the same target will not be run.

If make terminates for any reason including a signal with child processes running, it waits for them to finish before actually exiting. When the system is heavily loaded, you will probably want to run fewer jobs than when it is lightly loaded. When running several recipes in parallel the output from each recipe appears as soon as it is generated, with the result that messages from different recipes may be interspersed, sometimes even appearing on the same line. This can make reading the output very difficult.

This option instructs make to save the output from the commands it invokes and print it all once the commands are completed. Additionally, if there are multiple recursive make invocations running in parallel, they will communicate so that only one of them is generating output at a time. There are four levels of granularity when synchronizing output, specified by giving an argument to the option e.

This is the default: all output is sent directly as it is generated and no synchronization is performed. Output from each individual line of the recipe is grouped and printed as soon as that line is complete. If a recipe consists of multiple lines, they may be interspersed with lines from other recipes. Output from the entire recipe for each target is grouped and printed once the target is complete. This is the default if the --output-sync or -O option is given with no argument.

Output from each recursive invocation of make is grouped and printed once the recursive invocation is complete. Regardless of the mode chosen, the total build time will be the same.

The only difference is in how the output appears. The difference between them is in how recipes that contain recursive invocations of make are treated see Recursive Use of make.

This ensures output from all the targets built by a given recursive make instance are grouped together, which may make the output easier to understand. However it also leads to long periods of time during the build where no output is seen, followed by large bursts of output. If you are not watching the build as it proceeds, but instead viewing a log of the build after the fact, this may be the best option for you.

If you are watching the output, the long gaps of quiet during the build can be frustrating. The recursive make will perform the synchronization for its targets and the output from each will be displayed immediately when it completes. Be aware that output from recursive lines of the recipe are not synchronized for example if the recursive line prints a message before running make , that message will not be synchronized.

For example, many programs that can display colorized output will not do so if they determine they are not writing to a terminal. Two processes cannot both take input from the same device at the same time. To make sure that only one recipe tries to take input from the terminal at once, make will invalidate the standard input streams of all but one running recipe.

It is unpredictable which recipe will have a valid standard input stream which will come from the terminal, or wherever you redirect the standard input of make. The first recipe run will always get it first, and the first recipe started after that one finishes will get it next, and so on.

We will change how this aspect of make works if we find a better alternative. In the mean time, you should not rely on any recipe using standard input at all if you are using the parallel execution feature; but if you are not using this feature, then standard input works normally in all recipes. After each shell invocation returns, make looks at its exit status.

If the shell completed successfully the exit status is zero , the next line in the recipe is executed in a new shell; after the last line is finished, the rule is finished. If there is an error the exit status is nonzero , make gives up on the current rule, and perhaps on all rules. Sometimes the failure of a certain recipe line does not indicate a problem. For example, you may use the mkdir command to ensure that a directory exists. If the directory already exists, mkdir will report an error, but you probably want make to continue regardless.

This is less flexible but sometimes useful. When an error happens that make has not been told to ignore, it implies that the current target cannot be correctly remade, and neither can any other that depends on it either directly or indirectly.

No further recipes will be executed for these targets, since their preconditions have not been achieved. Normally make gives up immediately in this circumstance, returning a nonzero status.

The usual behavior assumes that your purpose is to get the specified targets up to date; once make learns that this is impossible, it might as well report the failure immediately. Usually when a recipe line fails, if it has changed the target file at all, the file is corrupted and cannot be used—or at least it is not completely updated.

The situation is just the same as when the shell is killed by a signal; see Interrupts. So generally the right thing to do is to delete the target file if the recipe fails after beginning to change the file. This is almost always what you want make to do, but it is not historical practice; so for compatibility, you must explicitly request it.

If make gets a fatal signal while a shell is executing, it may delete the target file that the recipe was supposed to update. The purpose of deleting the target is to make sure that it is remade from scratch when make is next run.

Why is this? Suppose you type Ctrl-c while a compiler is running, and it has begun to write an object file foo. The Ctrl-c kills the compiler, resulting in an incomplete file whose last-modification time is newer than the source file foo. But make also receives the Ctrl-c signal and deletes this incomplete file. If make did not do this, the next invocation of make would think that foo. You can prevent the deletion of a target file in this way by making the special target.

Before remaking a target, make checks to see whether it appears on the prerequisites of. Some reasons why you might do this are that the target is updated in some atomic fashion, or exists only to record a modification-time its contents do not matter , or must exist at all times to prevent other sorts of trouble.

Although make does its best to clean up there are certain situations in which cleanup is impossible. For example, make may be killed by an uncatchable signal.

Or, one of the programs make invokes may be killed or crash, leaving behind an up-to-date but corrupt target file: make will not realize that this failure requires the target to be cleaned. Or make itself may encounter a bug and crash.

Most commonly these recipes create temporary files rather than updating the target directly, then rename the temporary file to the final target name. Recursive use of make means using make as a command in a makefile. This technique is useful when you want separate makefiles for various subsystems that compose a larger system.

You can do it by writing this:. You can write recursive make commands just by copying this example, but there are many things to know about how they work and why, and about how the sub- make relates to the top-level make. This value is never touched by make again: in particular note that if you include files from other directories the value of CURDIR does not change.

The value has the same precedence it would have if it were set in the makefile by default, an environment variable CURDIR will not override this value. Note that setting this variable has no impact on the operation of make it does not cause make to change its working directory, for example. The value of this variable is the file name with which make was invoked. If you use a special version of make to run the top-level makefile, the same special version will be executed for recursive invocations.

See Instead of Executing the Recipes. This special feature is only enabled if the MAKE variable appears directly in the recipe: it does not apply if the MAKE variable is referenced through expansion of another variable. Recipe lines containing MAKE are executed normally despite the presence of a flag that causes most recipes not to be run.

Variable values of the top-level make can be passed to the sub- make through the environment by explicit request. To pass down, or export , a variable, make adds the variable and its value to the environment for running each line of the recipe.

The sub- make , in turn, uses the environment to initialize its table of variable values. Except by explicit request, make exports a variable only if it is either defined in the environment initially or set on the command line, and if its name consists only of letters, numbers, and underscores.

Some shells cannot cope with environment variable names consisting of characters other than letters, numbers, and underscores. See Choosing the Shell. Variables are not normally passed down if they were created by default by make see Variables Used by Implicit Rules.

The sub- make will define these for itself. If you want to export specific variables to a sub- make , use the export directive, like this:.

If you want to prevent a variable from being exported, use the unexport directive, like this:. In both of these forms, the arguments to export and unexport are expanded, and so could be variables or functions which expand to a list of variable names to be un exported. You may notice that the export and unexport directives work in make in the same way they work in the shell, sh. This tells make that variables which are not explicitly mentioned in an export or unexport directive should be exported.

Any variable given in an unexport directive will still not be exported. If you use export by itself to export variables by default, variables whose names contain characters other than alphanumerics and underscores will not be exported unless specifically mentioned in an export directive. The behavior elicited by an export directive by itself was the default in older versions of GNU make.

If your makefiles depend on this behavior and you want to be compatible with old versions of make , you can write a rule for the special target. This will be ignored by old make s, while the export directive will cause a syntax error. Likewise, you can use unexport by itself to tell make not to export variables by default. Since this is the default behavior, you would only need to do this if export had been used by itself earlier in an included makefile, perhaps.

You cannot use export and unexport by themselves to have variables exported for some recipes and not for others. The last export or unexport directive that appears by itself determines the behavior for the entire run of make. The incrementation happens when make sets up the environment for a recipe.

This variable, if defined in the outer-level makefile, is passed down through the environment; then it serves as a list of extra makefiles for the sub- make to read before the usual or specified ones.

This variable is set up automatically by make to contain the flag letters that make received. In response, it takes the flags from that value and processes them as if they had been given as arguments. See Overriding Variables. This is not usually useful to do. You probably do not care about this. If you want your makefiles to be compatible with old make programs, use this technique; it will work fine with more modern make versions too. That variable is set only for compatibility; make does not interpret a value you set for it in any way.

If you do put MAKEFLAGS in your environment, you should be sure not to include any options that will drastically affect the actions of make and undermine the purpose of makefiles and of make itself. When the same sequence of commands is useful in making various targets, you can define it as a canned sequence with the define directive, and refer to the canned sequence from the recipes for those targets.

The canned sequence is actually a variable, so the name must not conflict with other variable names. Here run-yacc is the name of the variable being defined; endef marks the end of the definition; the lines in between are the commands. This year, choose Freedom as a gift. Here's an Ethical Tech Giving Guide. UK universities find that many students are fed up with virtual courses and want to attend class physically.

Others feel the opposite. If you are a student, or have been admitted, and you are disgusted with being forced to use nonfree software for school, now is your chance to make a difference — tell the university you don't want to do that. Be civil to the staff, but show how strongly you feel this. Chat network. Read the full announcement and the follow-up update. The GNU Project supports the Free Software Foundation's petition to call on school administrators around the world to stop requiring students to run nonfree software.

Sign the petition for freedom in the classroom. The GNU Project strongly urges the community to communicate in ways that are friendly, welcoming and kind. This conference is open to everyone an Most versions of Make will assume they must therefore recompile all the source files that use the header file; but GNU Make gives you a way to avoid the recompilation, in the case where you know your change to the header file does not require it.

We have developed conventions for how to write Makefiles, which all GNU packages ought to follow. It is a good idea to follow these conventions in your program even if you don't intend it to be GNU software, so that users will be able to build your package just like many other packages, and will not need to learn anything special before doing so.

It can also be found on the GNU mirrors ; please use a mirror if possible. Documentation for Make is available online, as is documentation for most GNU software. A brief summary is available by running make --help. Announcements about Make and most other GNU software are made on info-gnu archive. Security reports that should not be made immediately public can be sent directly to the maintainer. If there is no response to an urgent issue, you can escalate to the general security mailing list for advice.

Development of Make, and GNU in general, is a volunteer effort, and you can contribute. For information, please read How to help GNU. If you'd like to get involved, it's a good idea to join the discussion mailing list see above. We defend the rights of all software users.